This invention relates broadly to a programmable universal logic driver for computer logic testing and more narrowly but not by way of limitation to a logic driver for handling various voltage combinations encountered between a microprocessor control and a unit under test.
Heretofore, there has been no single interface driver circuit used with automated test systems which can handle all present logic families and special requirements for set up of a unit under test. For example, CMOS uses supply voltages from -12 VDC to +12 VDC with 12 volt changes from "Hi" to "Lo" states. ECL requires 0 VDC and -5.2 VDC with 1 volt changes while TTL uses 0 VDC and +5 VDC supply voltage with 2.5 to 4 volt changes from "Hi" to "Lo" states. Microprocessor designs require bi-directional signals and driver "tri-state" or electronic "off" states.
Because of the above, extremely complex interface circuitry has been developed which has not been able to be quickly, conveniently and reliably connected and able to drive all of the present logic families. This problem is compounded as new families of logic are developed such as I.sup.2 L, where currents, not voltages are used to effect logic changes.
Previous circuit designs have been able to cover some but not all of the logic family parameters. Designs that have totem-pole logic outputs are bias sensitive and can handle only positive variations in voltage swing or small excursion positive to negative voltage swings but not all combinations of voltage limits because the input drive to this circuit varies as the output driver voltage bias is moved. This causes the circuits to not work when some combination is encountered that changes the driver biasing cutting off a stage that needs to be on. Adding shut-off stages for tri-state further complicates this bias problem. Most equipment today uses a mixture of driver designs or requires circuit board changes to provide test capability for all logic types. No single design has been found to handle all requirements for voltage or current drive to suit all requirements.
In U.S. Pat. No. 3,597,682 to Hubbs et al, U.S. Pat. No. 3,832,535 to DeVito, U.S. Pat. No. 4,070,565 to Borrelli, U.S. Pat. No. 4,102,491 to DeVito et al, U.S. Pat. No. 4,108,358 to Niemaszyk et al, U.S. Pat. No. 4,285,059 to Burlage et al, U.S. Pat. No. 4,291,404 to Steiner and U.S. Pat. No. 4,335,457 to Early various programmable power supply and digital logic devices are disclosed. None of the disclosures in these prior art patents specifically provide the unique features and advantages of the subject programmable universal logic driver as described herein.